Method And System For A Low-Voltage Integrated Silicon High-Speed Modulator

ABSTRACT

Methods and systems for a low-voltage integrated silicon high-speed modulator may include an optical modulator comprising first and second optical waveguides and two optical phase shifters, where each of the two optical phase shifters may comprise a p-n junction with a horizontal section and a vertical section and an optical signal is communicated to the first optical waveguide. A portion of the optical signal may then be coupled to the second optical waveguide. A phase of at least one optical signal in the waveguides may be modulated utilizing the optical phase shifters. A portion of the phase modulated optical signals may be coupled between the two waveguides, thereby generating two output signals from the modulator. A modulating signal may be applied to the phase shifters which may include a reverse bias.

CROSS-REFERENCE TO RELATED APPLICATIONS/INCORPORATION BY REFERENCE

This application is a continuation of application Ser. No. 16/841,615filed Apr. 6, 2020, which is a continuation of application Ser. No.16/057,508 filed on Aug. 7, 2018, now U.S. Pat. No. 10,613,358, which isa continuation of application Ser. No. 15/402,400 filed on Jan. 10,2017, now U.S. Pat. No. 10,048,518, which is a continuation ofapplication Ser. No. 14/217,743 filed on Mar. 18, 2014, now U.S. Pat.No. 9,541,775, which claims priority to U.S. Provisional Application61/852,702, filed on Mar. 19, 2013, each of which is hereby incorporatedherein by reference in its entirety.

FIELD

Certain embodiments relate to semiconductor processing. Morespecifically, certain embodiments relate to a method and system for alow-voltage integrated silicon high-speed modulator.

BACKGROUND

As data networks scale to meet ever-increasing bandwidth requirements,the shortcomings of copper data channels are becoming apparent. Signalattenuation and crosstalk due to radiated electromagnetic energy are themain impediments encountered by designers of such systems. They can bemitigated to some extent with equalization, coding, and shielding, butthese techniques require considerable power, complexity, and cable bulkpenalties while offering only modest improvements in reach and verylimited scalability. Free of such channel limitations, opticalcommunication has been recognized as the successor to copper links.

Further limitations and disadvantages of conventional and traditionalapproaches will become apparent to one of skill in the art, throughcomparison of such systems with the present invention as set forth inthe remainder of the present application with reference to the drawings.

BRIEF SUMMARY

A system and/or method for a low-voltage integrated silicon high-speedmodulator, substantially as shown in and/or described in connection withat least one of the figures, as set forth more completely in the claims.

Various advantages, aspects and novel features of the present invention,as well as details of an illustrated embodiment thereof, will be morefully understood from the following description and drawings.

BRIEF DESCRIPTION OF SEVERAL VIEWS OF THE DRAWINGS

FIG. 1A is a block diagram of a photonically enabled CMOS chipcomprising low-voltage, high-speed modulators, in accordance with anexample embodiment of the disclosure.

FIG. 1B is a diagram illustrating a CMOS chip, in accordance with anexample embodiment of the disclosure.

FIG. 1C is a diagram illustrating a CMOS chip coupled to an opticalfiber cable, in accordance with an example embodiment of the disclosure.

FIG. 2 is a schematic illustrating an electro-optic modulator, inaccordance with an example embodiment of the disclosure.

FIG. 3 illustrates a vertical p-n junction optical phase shifter, inaccordance with an example embodiment of the disclosure.

FIG. 4 illustrates a horizontal junction optical phase shifter, inaccordance with an example embodiment of the disclosure.

FIG. 5 illustrates modeling results for a horizontal junction opticalphase shifter, in accordance with an example embodiment of thedisclosure.

DETAILED DESCRIPTION

Certain aspects of the disclosure may be found in a method and systemfor a low-voltage integrated silicon high-speed modulator. Exemplaryaspects of the disclosure may comprise an optical modulator comprisingfirst and second optical waveguides and two optical phase shifters,where each of the two optical phase shifters comprise a p-n junctionwith a horizontal section and a vertical section, and where an opticalsignal is communicated to the first optical waveguide. A portion of theoptical signal may then be coupled to the second optical waveguide. Aphase of at least one optical signal in the first and second waveguidesmay be modulated utilizing the optical phase shifters. A portion of thephase modulated optical signals may be coupled between the twowaveguides, thereby generating two output signals from the modulator. Amodulating signal may be applied to the phase shifters. The p-n junctionof the phase shifters may be reverse biased for modulating the phase ofthe at least one optical signal. The horizontal and vertical sections ofthe p-n junction may form an “L” shape. The p-n junction may comprisethree rectangular sections, a first section being an p-typesemiconductor layer, a second section being a portion of an n-typesemiconductor layer coplanar with the first section, and a third sectionbeing another portion of the n-type semiconductor layer but formed abovethe first and second sections. The p-n junction may be reverse biasedsuch that a depletion width of the p-n junction extends across most butnot all of the third section. The modulator may be integrated insilicon. The horizontal and vertical sections of the p-n junction may beformed in a waveguide rib. The modulator may be integrated in a CMOSchip. The p-n junction may be formed by ion implantation.

FIG. 1A is a block diagram of a photonically enabled CMOS chipcomprising low-voltage, high-speed modulators, in accordance with anexample embodiment of the disclosure. Referring to FIG. 1A, there isshown optoelectronic devices on a CMOS chip 130 comprising opticalmodulators 105A-105D, photodiodes 111A-111D, monitor photodiodes113A-113H, and optical devices comprising directional couplers103A-103K, optical terminations 115A-115D, and grating couplers117A-117H. There are also shown electrical devices and circuitscomprising amplifiers 107A-107D, analog and digital control circuits109, and control sections 112A-112D. The amplifiers 107A-107D maycomprise transimpedance and limiting amplifiers (TIA/LAs), for example.

Optical signals are communicated between optical and optoelectronicdevices via optical waveguides 110 fabricated in the CMOS chip 130.Single-mode or multi-mode waveguides may be used in photonic integratedcircuits. Single-mode operation enables direct connection to opticalsignal processing and networking elements. The term “single-mode” may beused for waveguides that support a single mode for each of the twopolarizations, transverse-electric (TE) and transverse-magnetic (TM), orfor waveguides that are truly single mode and only support one modewhose polarization is TE, which comprises an electric field parallel tothe substrate supporting the waveguides. Two typical waveguidecross-sections that are utilized comprise strip waveguides and ribwaveguides. Strip waveguides typically comprise a rectangularcross-section, whereas rib waveguides comprise a rib section on top of awaveguide slab.

The optical modulators 105A-105D comprise Mach-Zehnder or ringmodulators, for example, and enable the modulation of thecontinuous-wave (CW) laser input signal. The optical modulators105A-105D comprise high-speed and low-speed phase modulation sectionsand are controlled by the control sections 112A-112D. The high-speedphase modulation section of the optical modulators 105A-105D maymodulate a CW light source signal with a data signal. The low-speedphase modulation section of the optical modulators 105A-105D maycompensate for slowly varying phase factors such as those induced bymismatch between the waveguides, waveguide temperature, or waveguidestress and this low-speed adjustment or modulation is referred to as thepassive phase, or the passive biasing of the MZI.

The electro-optical modulator is one of the main building blocks insilicon photonic transceiver circuits. In general, both phase andintensity can be used to modulate light. A conventional phase modulatoron a silicon platform is a p-n junction embedded into a waveguide. It isoften used in a Mach-Zehnder interferometer configuration, whichconsists of two arms receiving similar optical intensity after a powersplitter. With each arm endowed with a phase modulator, it is thenpossible to achieve intensity modulation by interfering the outputs ofthe two arms, using a power combiner, as shown in FIG. 2.

The phase modulators may have a dual role: to compensate for the passivebiasing of the MZI and to apply the additional phase modulation used tomodulate the light intensity at the output port of the MZI according toa data stream. The former phase tuning and the latter phase modulationmay be applied by separate, specialized devices, since the former is alow speed, slowly varying contribution, while the latter is typically ahigh speed signal. These devices are then respectively referred to asthe LSPM and the HSPM. Examples for LSPM are thermal phase modulators(TPM), where a waveguide portion is locally heated up to modify theindex of refraction of its constituting materials, or forward biased PINjunction phase modulators (PINPM) where current injection into the PINjunction modifies the carrier density, and thus the index of refractionof the semiconductor material. An example of an HSPM is a reversedbiased PIN junction, where the index of refraction is also modulated viathe carrier density, but which allows much faster operation, albeit at alower phase modulation efficiency per waveguide length.

The outputs of the modulators 105A-105D may be optically coupled via thewaveguides 110 to the grating couplers 117E-117H. The directionalcouplers 103A-103K may comprise four-port optical couplers, for example,and may be utilized to sample or split the optical signals generated bythe optical modulators 105A-105D, with the sampled signals beingmeasured by the monitor photodiodes 113A-113H. The unused branches ofthe directional couplers 103D-103K may be terminated by opticalterminations 115A-115D to avoid back reflections of unwanted signals.

The grating couplers 117A-117H comprise optical gratings that enablecoupling of light into and out of the CMOS chip 130. The gratingcouplers 117A-117D may be utilized to couple light received from opticalfibers into the CMOS chip 130, and the grating couplers 117E-117H may beutilized to couple light from the CMOS chip 130 into optical fibers. Thegrating couplers 117A-117H may comprise single polarization gratingcouplers (SPGC) and/or polarization splitting grating couplers (PSGC).In instances where a PSGC is utilized, two input/output, waveguides maybe utilized.

The optical fibers may be epoxied, for example, to the CMOS chip, andmay be aligned at an angle from normal to the surface of the CMOS chip130 to optimize coupling efficiency. In an example embodiment, theoptical fibers may comprise single-mode fiber (SMF) and/orpolarization-maintaining fiber (PMF).

In another exemplary embodiment, optical signals may be communicateddirectly into the surface of the CMOS chip 130 without use of opticalfibers by directing a light source on an optical coupling device in thechip, such as the light source interface 135 and/or the optical fiberinterface 139. This may be accomplished with directed laser sourcesand/or optical sources on another chip flip-chip bonded to the CMOS chip130.

The photodiodes 111A-111D may convert optical signals received from thegrating couplers 117A-117D into electrical signals that are communicatedto the amplifiers 107A-107D for processing. In another embodiment of theinvention, the photodiodes 111A-111D may comprise high-speedheterojunction phototransistors, for example, and may comprise germanium(Ge) in the collector and base regions for absorption in the 1.3-1.6 μmoptical wavelength range, and may be integrated on a CMOSsilicon-on-insulator (SOI) wafer.

The analog and digital control circuits 109 may control gain levels orother parameters in the operation of the amplifiers 107A-107D, which maythen communicate electrical signals off the CMOS chip 130. The controlsections 112A-112D comprise electronic circuitry that enable modulationof the CW laser signal received from the splitters 103A-103C. Theoptical modulators 105A-105D may require high-speed electrical signalsto modulate the refractive index in respective branches of aMach-Zehnder interferometer (MZI), for example. In an exampleembodiment, the control sections 112A-112D may include sink and/orsource driver electronics that may enable a bidirectional link utilizinga single laser.

In operation, the CMOS chip 130 may be operable to transmit and/orreceive and process optical signals. Optical signals may be receivedfrom optical fibers by the grating couplers 117A-117D and converted toelectrical signals by the photodetectors 111A-111D. The electricalsignals may be amplified by transimpedance amplifiers in the amplifiers107A-107D, for example, and subsequently communicated to otherelectronic circuitry, not shown, in the CMOS chip 130.

Integrated photonics platforms allow the full functionality of anoptical transceiver to be integrated on a single chip, such as the CMOSchip 130, for example. A transceiver chip comprises optoelectroniccircuits that create and process the optical/electrical signals on thetransmitter (Tx) and the receiver (Rx) sides, as well as opticalinterfaces that couple the optical signal to and from one or morefibers. The signal processing functionality may comprise modulating theoptical carrier, detecting the optical signal, splitting or combiningdata streams, and multiplexing or demultiplexing data on carriers withdifferent wavelengths. In another example scenario, a plurality of chipsmay be utilized, with an optical interposer for receiving electronicschips and photonics chips, in instances where the electronics chips andphotonics chips are manufactured in different CMOS nodes.

The light source may be external to the chip or may be integrated withthe chip in a hybrid scheme. It is often advantageous to have anexternal continuous-wave (CW) light source, because this architectureallows heat sinking and temperature control of the source separatelyfrom the transceiver chip 130. An external light source may also beconnected to the transceiver chip 130 via a fiber interface.

An integrated transceiver may comprise at least three opticalinterfaces, including a transmitter input port to interface to the CWlight source, labeled as “CW Laser In 101”; a transmitter output port tointerface to the fiber carrying the optical signal, labeled “OpticalSignals Out”; and a receiver input port to interface to the fibercarrying the optical signal, labeled “Optical Signals In”.

In an example scenario, the optical modulators 105A-105D may compriselow-voltage, high-speed modulators with a horizontal p-n junctiondesign, as shown in at least FIG. 4, which may result in improved modaloverlap of the depletion region with the propagating optical mode. Thismay be compared to a vertical p-n junction design as shown in FIG. 3.

FIG. 1B is a diagram illustrating an exemplary CMOS chip, in accordancewith an exemplary embodiment of the invention. Referring to FIG. 1B,there is shown the CMOS chip 130 comprising electronic devices/circuits131, optical and optoelectronic devices 133, a light source interface135, CMOS chip front surface 137, an optical fiber interface 139, andCMOS guard ring 141.

The light source interface 135 and the optical fiber interface 139comprise grating couplers, for example, that enable coupling of lightsignals via the CMOS chip surface 137, as opposed to the edges of thechip as with conventional edge-emitting devices. Coupling light signalsvia the CMOS chip surface 137 enables the use of the CMOS guard ring 141which protects the chip mechanically and prevents the entry ofcontaminants via the chip edge.

The electronic devices/circuits 131 comprise circuitry such as theamplifiers 107A-107D and the analog and digital control circuits 109described with respect to FIG. 1A, for example. The optical andoptoelectronic devices 133 comprise devices such as the directionalcouplers 103A-103K, optical terminations 115A-115D, grating couplers117A-117H, optical modulators 105A-105D, high-speed heterojunctionphotodiodes 111A-111D, and monitor photodiodes 113A-113H.

In an example scenario, the optical modulators 105A-105D may compriselow-voltage, high-speed modulators with a horizontal p-n junction designwith improved modal overlap of the depletion region with the propagatingoptical mode.

FIG. 1C is a diagram illustrating a CMOS chip coupled to an opticalfiber cable, in accordance with an exemplary embodiment of theinvention. Referring to FIG. 1C, there is shown the CMOS chip 130comprising the CMOS chip surface 137, and the CMOS guard ring 141. Thereis also shown a fiber-to-chip coupler 143, an optical fiber cable 145,and an optical source assembly 147.

The CMOS chip 130 comprising the electronic devices/circuits 131, theoptical and optoelectronic devices 133, the light source interface 135,the CMOS chip surface 137, and the CMOS guard ring 141 may be asdescribed with respect to FIG. 1B.

In an example scenario, the optical modulators 105A-105D may compriselow-voltage, high-speed modulators with a horizontal p-n junction designwith improved modal overlap of the depletion region with the propagatingoptical mode.

FIG. 2 is a schematic illustrating an electro-optic modulator, inaccordance with an example embodiment of the disclosure. Referring toFIG. 2, there is shown an optical modulator 200 comprising opticalwaveguides 201A and 201B and optical phase shifters 203A and 203B. Thereis also shown an input signal P_(in) 205 and output signals P_(out) 207Aand 207B.

The waveguides 201A and 201B may comprise materials of differingdielectric constants such that optical signals are confined. Forexample, a silicon waveguide with air and/or silicon dioxide claddingmay carry optical signals and may come into close proximity at twolocations in the optical modulator 200 as shown in FIG. 2, which mayresult in a transfer of a portion of the optical mode from one waveguideto the other.

The optical phase shifters 203A and 203B may comprise optoelectronicdevices that may be operable to shift the phase of received opticalsignals. For example, p-n junctions formed in the waveguides 201A and201B may be utilized to shift the phase of optical signals that travelthrough the depletion region, since the index of refraction is changedwith respect to the non-depleted regions of the waveguides.Reverse-biased p-n junctions result in an increased depletion width andthus more phase shift.

Optical modulation amplitude (OMA) is one of the key performanceparameters of an electro-optic phase modulator used in digitalcommunication systems. The OMA directly influences the system bit errorrate (BER) and hence is desired to be as large as possible. In bi-leveloptical signaling schemes, the higher level represents a binary one, andthe lower power level represents a zero (maximum and minimum of Po inFIG. 2). OMA is defined as the difference between the high and lowlevels: OMA=max(P_(out))−min(P_(out)).

The magnitude of OMA depends on phase shift difference accumulatedbetween the two arms, waveguides 201A and 201B, of the optical modulator200 as well as the optical loss that the beam suffers passing throughthe waveguides. The following equation describes this relation:

OMA(L)=P _(in) e ^(−α·L) sin(θ·L)

where P_(in) is the input optical power, α is the optical loss per unitlength, L is the length of the modulator and θ is the difference inphase shift between two arms per unit length. As can be seen from therelation, OMA increases with increasing phase shift and decreases byincreasing loss. As a result, there is an optimal modulator length,beyond which the OMA no longer improves.

FIG. 3 illustrates a vertical p-n junction optical phase shifter, inaccordance with an example embodiment of the disclosure. Referring toFIG. 3, there is shown a p-n junction optical phase shifter 300comprising p-region 305, n-region 307, contacts 301A and 301B, a p+region 303 and an n+ region 309. There is also shown an anode and acathode where electrical connections may be made.

The contacts 301A and 301B may comprise metal layers formed on the p+region 303 and the n+ region 309, for providing a low-resistanceelectrical connection to the p-n junction. The p+ region 303 and n+region may comprise p-type and n-type doped regions, respectively, withhigher doping than the p-region 305 and the n-region 307. This higherdoping may be useful for reducing the resistance of electrical contactto the p-n junction formed by the p-region 305 and the n-region 307. Inanother example scenario, a p++ region and an n++ region may beoptionally formed under the contacts 301A and 301B, respectively, forbetter electrical contact, i.e., lower contact resistance.

The waveguide rib shown in FIG. 3 may be formed by etching portions ofthe p+ region 303, the p-region 305, the n-region 307, and the n+ region309, with what may considered a “shallow” trench etch as compared to adeep trench etch for isolating optical devices by etching down to theinsulator layer in a silicon-on-insulator (SOI) CMOS wafer, for example.In an example scenario, the doping in the p+ region 303, the p-region305, the n-region 307, and the n+ region 309 may be formed through ionimplantation, for example, although other techniques are possible, suchas diffusion.

Depletion mode p-n junction modulators are used for high-speed siliconphotonics applications because their intrinsic bandwidth may be wellbeyond 100 GHz. However, their disadvantage is that they generallysuffer from smaller phase shifts compared to other means. A typical p-njunction is shown in FIG. 3, where the vertical p-n junction is placedin the middle of the waveguide rib where the optical mode propagates.The phase shift limitation in this type of modulator is due to the poormodal overlap of the vertical depletion region with the propagatingoptical mode.

FIG. 4 illustrates a horizontal junction optical phase shifter, inaccordance with an example embodiment of the disclosure. Referring toFIG. 4, there is shown a horizontal junction optical phase shifter 400comprising contacts 401A and 401B, a p++region 403, a p+ region 405, ap-region 407, an n-region 409, an n+ region 411, and an n++ region 413.There is also shown a horizontal p-n junction 415, a vertical p-njunction 417, and a junction offset 419, the latter corresponding to thewidth between the vertical p-n junction 417 and the center of the rib.

The contacts 401A and 401B, p+ region, and n+ region 411 may be similarto the similarly named elements of FIG. 3, and the p++ region 403 andn++region 413 may be p- and n-doped regions, respectively, with higherdoping levels than the p+ and n+ regions for improved contactresistance.

The structure of the p-region 407 and the n-region 409, however, ismodified compared to FIG. 3 in that the p-n junction is now “L” shapedwith a horizontal junction 415 and a vertical junction 417. The p-layer407 and a portion of the n-layer 409 may be coplanar while a secondportion of the n-layer may be formed above the p-layer 407 and a portionof the n-layer 409. This profile was determined through rigorousprocess, electrical, and optical simulations and provides asignificantly improved modal overlap of the depletion region with thepropagating optical mode. As a result, OMA is greatly improved overprevious designs.

Depending on the junction offset 419, the length of the horizontal p-njunction 415 may be varied and a mostly horizontal p-n junction can beachieved. This mixed junction geometry can be realized by adjusting theimplantation process to implant the upper and lower portions of thewaveguide separately. In an example scenario, three implantation stepsmay be utilized for each section, i.e., the p-layer 407, the lowerportion of the n-layer 409, the upper portion of the n-layer 409. Theenergy and dose of each implantation step, as well as the horizontal andvertical location of the junction, may be optimized to achieve thehighest possible improvement in the OMA. Moreover, this choice may bebalanced to ensure an un-depleted, low-impedance path to the edge of thedepletion regions under all biasing conditions used in the modulator,which may assure that the phase shift of a modulator utilizing thehorizontal junction optical phase shifter 400 does not degrade at higherfrequencies.

In operation, the optical phase shifter 400 may be reverse biased forincreased phase shift per unit length, as the depletion width isincreased with reverse bias. For example, devices with the structureillustrated in FIG. 4 have exhibited over 22 degrees/mm at 1.8V bias. Amodulating signal may also be applied across the contacts 401A and 401Bto modulate an optical signal traveling through the phase shifter 400,which may travel into or out of the plane of the structure in FIG. 4.

FIG. 5 illustrates modeling results for a horizontal junction opticalphase shifter, in accordance with an example embodiment of thedisclosure. Referring to FIG. 5, there are shown simulation results forthe horizontal p-n junction comprising the p-layer 507 and n-layer 509.The plots below illustrate how the depletion width of an exemplaryjunction grows as the reverse voltage is varied from 0V to 1.8V.

The horizontal junction allows for the depletion width to grow mostlywhere the intensity of the optical mode is also highest, as illustratedby the contour lines indicating the optical mode intensity. At the sametime, the design is such that at the widest depletion width, there isstill some un-depleted, low impedance path to the edge of the depletionregion. A modulator with the modeled horizontal junction optical phaseshifters may result in a 2 dB improvement in OMA over a modulator withvertical junction optical phase shifters.

In an example embodiment, a method and system are disclosed for alow-voltage integrated silicon high-speed modulator. In this regard,aspects of the disclosure may comprise optical modulator comprisingfirst and second optical waveguides and two optical phase shifters,where each of the two optical phase shifters comprising a p-n junctionwith a horizontal section and a vertical section, and where opticalsignal is communicated to the first optical waveguide. A portion of theoptical signal may then be coupled to the second optical waveguide.

A phase of at least one optical signal in the first and secondwaveguides may be modulated utilizing the optical phase shifters. Aportion of the phase modulated optical signals may be coupled betweenthe two waveguides, thereby generating two output signals from themodulator. A modulating signal may be applied to the phase shifters formodulating the phase of the at least one optical signal. The p-njunction of the phase shifters may be reverse biased.

The horizontal and vertical sections of the p-n junction may form an “L”shape. The p-n junction may comprise three rectangular sections, a firstsection being a p-type semiconductor layer, a second section being aportion of an n-type semiconductor layer coplanar with the firstsection, and a third section being another portion of the n-typesemiconductor layer but formed above the first and second sections. Thep-n junction may be reverse biased such that a depletion width of thep-n junction extends across most but not all of the third section. Themodulator may be integrated in silicon. The horizontal and verticalsections of the p-n junction may be formed in a waveguide rib. Themodulator may be integrated in a CMOS chip. The p-n junction may beformed by ion implantation.

As utilized herein, “and/or” means any one or more of the items in thelist joined by “and/or”. As an example, “x and/or y” means any elementof the three-element set {(x), (y), (x, y)}. As another example, “x, y,and/or z” means any element of the seven-element set {(x), (y), (z), (x,y), (x, z), (y, z), (x, y, z)}. As utilized herein, the term “exemplary”means serving as a non-limiting example, instance, or illustration. Asutilized herein, the terms “e.g.,” and “for example” set off lists ofone or more non-limiting examples, instances, or illustrations. Asutilized herein, a device/module/circuitry/etc. is “operable” to performa function whenever the device/module/circuitry/etc. comprises thenecessary hardware and code (if any is necessary) to perform thefunction, regardless of whether performance of the function is disabled,or not enabled, by some user-configurable setting.

While the invention has been described with reference to certainembodiments, it will be understood by those skilled in the art thatvarious changes may be made and equivalents may be substituted withoutdeparting from the scope of the present invention. In addition, manymodifications may be made to adapt a particular situation or material tothe teachings of the present invention without departing from its scope.Therefore, it is intended that the present invention not be limited tothe particular embodiments disclosed, but that the present inventionwill include all embodiments falling within the scope of the appendedclaims.

What is claimed is:
 1. A waveguide, comprising: a slab portion includinga p-doped region and a first n-doped region that abut to define a firstPN junction in a first plane and including a first surface in a secondplane perpendicular to the first plane; and a rib portion including asecond n-doped region that projects perpendicularly from the first planefrom the p-doped region and the first n-doped region and defines asecond PN junction in the second plane.
 2. The waveguide of claim 1,further comprising: a p+ doped region extending from the p-doped regionin a first direction perpendicular to the first plane and including afirst portion that projects from the first surface to a third planeparallel to the second plane; and an n+ doped region extending from thefirst n-doped region in a second direction opposite to the firstdirection and including a second portion that projects from the firstsurface to the third plane.
 3. The waveguide of claim 2, furthercomprising: a p++ doped region extending from the first portion of thep+ doped region; and an n++ doped region extending from the secondportion of the n+ doped region.
 4. The waveguide of claim 3, furthercomprising: a first electrical contact connected to the p++ dopedregion; and a second electrical contact connected to the n++ dopedregion.
 5. The waveguide of claim 3, wherein: the first n-doped regionand the second n-doped region are doped at an equal concentration; then+ doped region is doped at a higher concentration than the firstn-doped region; the n++ doped region is doped at a higher concentrationthan the n+ doped region; the p+ doped region is doped at a higherconcentration than the p-doped region; and the p++ doped region is dopedat a higher concentration than the p+ doped region.
 6. The waveguide ofclaim 1, wherein the second plane is separated from a third plane thatis parallel to the second plane by a junction offset, wherein the thirdplane bisects the rib portion.
 7. The waveguide of claim 6, wherein thep-doped region contacts the rib portion on both sides of the thirdplane.
 8. A waveguide, comprising: a first doped portion having a firstside, a second side, and a third side; a second doped portion, having afourth side; a third doped portion, having a fifth side, and sixth side,and a seventh side; wherein the fourth side of the second doped portionabuts the third side of the first doped portion and the seventh side ofthe third doped portion and forms a first PN junction with a region ofthe seventh side of the third doped portion that the fourth side of thesecond doped portion abuts to; wherein the second side of the firstdoped portion abuts the sixth side of the third doped portion and formsa second PN junction; and wherein the first side of the first dopedportion and the fifth side of the third doped portion are coplanar; andwherein the third side of the first doped portion, the fourth side ofthe second doped portion, and the seventh side of the third dopedportion are coplanar.
 9. The waveguide of claim 8, wherein the firstdoped portion and the second doped portion are n doped, and wherein thethird doped portion is p doped.
 10. The waveguide of claim 8, whereinthe first doped portion and the second doped portion are p doped, andwherein the third doped portion is n doped.
 11. The waveguide of claim8, wherein the second doped portion is bisected by a first planeparallel to the second PN junction, wherein the second PN junction islocated in a second plane offset from the first plane by a junctionoffset.
 12. The waveguide of claim 11, wherein the third doped portionextends past the first plane to contact more of the fourth side of thesecond doped portion than the first doped portion contacts.
 13. Thewaveguide of claim 8, further comprising: a fourth doped portion, dopedat a higher concentration than the first doped portion, connected to thefirst doped portion opposite to the second PN junction; and a fifthdoped portion, doped at a higher concentration than the third dopedportion, connected to the second doped portion opposite to the second PNjunction.
 14. A waveguide, comprising: a slab portion including ann-doped region and a first p-doped region that abut to define a first PNjunction in a first plane and including a first surface in a secondplane perpendicular to the first plane; and a rib portion including asecond p-doped region that projects perpendicularly from the first planefrom the n-doped region and the first p-doped region and defines asecond PN junction in the second plane.
 15. The waveguide of claim 14,further comprising: a p+ doped region extending from the first p-dopedregion in a first direction perpendicular to the first plane andincluding a first portion that projects from the first surface to athird plane parallel to the second plane; and an n+ doped regionextending from the n-doped region in a second direction opposite to thefirst direction and including a second portion that projects from thefirst surface to the third plane.
 16. The waveguide of claim 15, furthercomprising: a p++ doped region extending from the first portion of thep+ doped region; and an n++ doped region extending from the secondportion of the n+ doped region.
 17. The waveguide of claim 16, furthercomprising: a first electrical contact connected to the p++ dopedregion; and a second electrical contact connected to the n++ dopedregion.
 18. The waveguide of claim 16, wherein: the first p-doped regionand the second p-doped region are doped at an equal concentration; then+ doped region is doped at a higher concentration than the n-dopedregion; the n++ doped region is doped at a higher concentration than then+ doped region; the p+ doped region is doped at a higher concentrationthan the first p-doped region; and the p++ doped region is doped at ahigher concentration than the p+ doped region.
 19. The waveguide ofclaim 14, wherein the second plane is separated from a third plane thatis parallel to the second plane by a junction offset, wherein the thirdplane bisects the rib portion.
 20. The waveguide of claim 19, whereinthe n-doped region contacts the rib portion on both sides of the thirdplane.